dec: 20 hex: 14 bin: 10100
The State Cell is a complex sequential logic gate with 2 inputs and 2 outputs used to create time based logic circuits.
|Circuit Plate +
Conductive Plate +
Silicon Chip +
The State Cell has 2 inputs and 2 outputs. When placed, on the ground, the side facing away from the player and the left sides are the outputs, while the other 2 are the inputs. The front is the end state output, the left is the running output, the back is the clock start input, and the right is the clock reset input.
When the clock start input is activated, the state cell starts its clock. While the clock is enabled, the running output remains enabled. Whenever the clock start or the clock reset inputs are enabled, the clock goes back to zero and is held there if the clock was running. When the clock reaches the end of its set time value, the end state output is pulsed, and the clock goes back to zero and is disabled. This time value can be set with the GUI.
A common application is to stack a bunch of state cells in a row, so one cell's end state output activates another's clock start input. A clock with custom intervals can be created this way.
A shift-right-click with a screwdriver can flip the state cell horizontally. When flipped, the gate's running and clock reset inputs swap sides.
|The timer GUI contains a few buttons to edit the timer value, which is show on the top. Several time-based gates share this same GUI.|
|v4.0.0||Added the State Cell.|
Issues pertaining to "State Cell" are maintained on the ProjectRed Github page. Report issues there.